General Description

The Realtek RTL8101L is a highly integrated and cost-effective single-chip Fast Ethernet controller that provides 32-bit performance, PCI bus master capability, and full compliance with IEEE 802.3u 100Base-TX specifications and IEEE 802.3x Full Duplex Flow Control. It also supports the Advanced Configuration Power management Interface (ACPI), PCI power management for modern operating systems that are capable of Operating System Directed Power Management (OSPM) to achieve the most efficient power management possible. The RTL8101L no longer supports CardBus mode as RTL8139C does.

Features:

Ethernet Controller Features:

100 pin LQFP

Integrated Fast Ethernet MAC, Physical chip and

transceiver in one chip

10 Mb/s and 100 Mb/s operation

Supports 10 Mb/s and 100 Mb/s N-way

Auto-negotiation operation

PCI local bus single-chip Fast Ethernet controller

— Compliant to PCI Revision 2.2

— Supports PCI clock 16.75MHz-40MHz

— Supports PCI target fast back-to-back transaction

— Provides PCI bus master data transfers and PCI memory space or I/O space mapped data transfers of RTL8101L's operational registers

— Supports PCI VPD (Vital Product Data)

— Supports ACPI, PCI power management

Supports 25MHz crystal or 25MHz OSC as the internal clock source. The frequency deviation of either crystal

or OSC must be within 50 PPM.

Compliant to PC99/PC2001standard

Supports Wake-On-LAN function and remote wake-up (Magic Packet*, LinkChg and Microsoft® wake-up frame)

Supports 4 Wake-On-LAN (WOL) signals (active high, active low, positive pulse, and negative pulse)

Supports auxiliary power-on internal reset, for remote wake-up when main power remains off

Supports auxiliary power auto-detect, and sets the related capability of power management registers in PCI

configuration space

Includes a programmable PCI burst size and early Tx/Rx threshold

Supports a 32-bit general-purpose timer with the external PCI clock as clock source to generate timer-interrupt

Contains two large (2Kbyte) independent receive and transmit FIFOs

Advanced power saving mode when LAN function or wakeup function is not used

Uses 93C46 (64*16-bit EEPROM) to store resource configuration, ID parameter, and VPD data

Supports LED pins for various network activity indications

Supports loopback capability

Half/Full duplex capability

Supports Full Duplex Flow Control (IEEE 802.3x)

3.3V power supply, 3.3V and 5V I/O tolerance

Interface for 128K byte (max) Boot ROM for both EEPROM and Flash Memory.

MC’97 Controller Features:

MC’97 compatible digital controller chip

PCI local bus single-chip Fast Ethernet controller

32-bit PCI bus master and PCI v 2.2 compliant

PCI Bus Power Management Interface Specification v1.1 compliant

High performance bus master DMA for data transfer

AC’97 v 2.2 compliant

Supports 16-bit modem line (LINE1)

Full-duplex operation for simultaneous LINE1 transactions

Low latency GPIO updated

8 double-WORD (16 samples) FIFO depth for each bus master of LINE1-OUT/IN

3.3V power supply, 3.3V and 5V I/O tolerance